SN74CBT3245CDWR

具有 –2V 下冲保护和 1 个控制输入的 5V、1:1 (SPST)、8 通道 FET 总线开关

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· Undershoot Protection for Off-Isolation on A and B Ports Up To −2 V
Bidirectional Data Flow, With Near-Zero Propagation Delay

· Low ON-State Resistance (ron) Characteristics (ron = 3 Ω Typical)

· Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5.5 pF Typical)

· Data and Control Inputs Provide Undershoot Clamp Diodes

· Low Power Consumption (ICC = 3 µA Max)

· VCC Operating Range From 4 V to 5.5 V

· Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)

· Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs

· Ioff Supports Partial-Power-Down Mode Operation

· Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

· ESD Performance Tested Per JESD 22

− 2000-V Human-Body Model (A114-B, Class II)

− 1000-V Charged-Device Model (C101)

· Supports Both Digital and Analog Applications: USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

description/ordering information

The SN74CBT3245C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3245C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3245C is organized as an 8-bit bus switch with a single output-enable (OE) input. When OE is low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the bus switch is OFF, and the high-impedance state exists between the A and B ports.

description/ordering information (continued)

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.