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CD74HC4020E_TI(德州仪器)中文资料_英文资料_价格_PDF手册

2024/7/1 14:57:08

275

CD74HC4020E

高速 CMOS 逻辑 14 级二进制计数器

 

 

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Features

 

• Fully Static Operation

• Buffered Inputs

• Common Reset

• Negative Edge Clocking

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . .-55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH


 

                                              

 

Description

 

The ’HC4020 and ’HCT4020 are 14-stage ripple-carry binary counters. All counter stages are master-slave flip f lops. The state of the stage advances one count on the negative clock transition of each input pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.