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SN74CBT3253CDR_TI(德州仪器)中文资料_英文资料_价格_PDF手册

2024/5/24 17:58:12

386

SN74CBT3253CDR

具有 –2V 下冲保护的 5V、4:1、2 通道 FET 总线开关

 

 


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FEATURES

 

• SN74CBT3253C Functionally Identical to Industry-Standard ’3253 Function

• Undershoot Protection for Off-Isolation on A and B Ports up to –2 V

• Bidirectional Data Flow, With Near-Zero Propagation Delay

• Low ON-State Resistance (r on) Characteristics(r on = 3 Ω Typical)

• Low Input/Output Capacitance Minimizes Loading and Signal Distortion(Cio(OFF) = 5.5 pF Typical)

• Data and Control Inputs Provide Undershoot Clamp Diodes

• Low Power Consumption (ICC = 3 µA Max)

• VCC Operating Range From 4 V to 5.5 V

• Data I/Os Support 0 to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)

• Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs

• I off Supports Partial-Power-Down Mode Operation

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model (A114-B, Class II)

– 1000-V Charged-Device Model (C101)

• Supports I 2C Bus Expansion

• Supports Both Digital and Analog Applications: USB Interface, Bus Isolation, Low-Distortion Signal Gating

 

 

                                     

DESCRIPTION/ORDERING INFORMATION

 

The SN74CBT3253C is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (r on), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3253C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

 

The SN74CBT3253C is organized as two 1-of-4 multiplexer/demultiplexers with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of each multiplexer/demultiplexer. When OE is low, the associated multiplexer/demultiplexer is enabled, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated multiplexer/demultiplexer is disabled, and a high-impedance state exists between the A and B ports.