2024/7/9 13:49:38
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· Qualified for Automotive Applications
· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
· 2-V to 5.5-V VCC Operation
· Max tpd of 6.5 ns at 5 V
· Typical VOLP (Output Ground Bounce)<0.8 V at VCC = 3.3 V, TA = 25°C
· Typical VOHV (Output VOH Undershoot)2.3 V at VCC = 3.3 V, TA = 25°C
· Supports Mixed-Mode Voltage Operation on All Ports
· Ioff Supports Partial-Power-Down Mode Operation
description/ordering information
These quadruple 2-input positive-OR gates are designed for 2-V to 5.5-V VCC operation.
The SN74LV32A performs the Boolean function Y A BorY A•B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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