2024/7/9 13:45:56
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FEATURES
• Qualified for Automotive Applications
• ESDProtection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Operates From 2 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Maxtpd of 5.2 ns at 3.3 V
• Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C

DESCRIPTION/ORDERING INFORMATION
The SN74LVC74A-Q1 dual positive-edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

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20万现货SKU
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科技智能大仓储
4小时快速交货
仅从原厂和代理商进货
每一颗料均可原厂追溯
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